In many computer system environments each component associated with the computer system shares a bus or a plurality of buses with other system components. Computer components may include individual computer boards created to provide functions such as an enhanced graphics board, a memory board, or an audio board. Often, several boards wish to utilize a bus simultaneously; thus various arbitration methods for determining which component has the highest priority bus acquisition request have been developed.
Computer systems typically incorporate either a central arbitration scheme or a distributed arbitration scheme. A central arbitration scheme utilizes a single, central arbitration device for the entire computer system. Thus, each system component sends its bus acquisition request to the central arbitration device which determines the appropriate priority. A distributed arbitration scheme, however, incorporates arbitration devices on each computer system component. Thus, in a distributed arbitration scheme, each component prioritizes the bus acquisition requests of the various devices on its own component board.
Regardless of the arbitration method, central or distributed, sequencing various bus acquisition requests is a challenging endeavor. Prior art arbitration methodologies have weaknesses because under certain circumstances high priority tasks must wait while low priority tasks compete for mastership of the bus. This problem is called a priority inversion and may result in important tasks not meeting their deadlines.
It is an object of this invention to provide a method of request sequencing which provides self-preemption on its own component board to eliminate priority inversions and therefore improve system performance. Other objects and advantages of the invention will become apparent to those of ordinary skill in the art having reference to the following specification together with the drawings herein.